1. Technical Field
Embodiments described herein relate generally to semiconductor circuit technology, and more particularly, to an impedance calibration period setting circuit and semiconductor integrated circuit.
2. Background
To achieve uniform input and output characteristics irrespective of fluctuations in environmental conditions, such as process/voltage/temperature (PVT), a semiconductor integrated circuit uses an on die termination function allowing the device to maintain a target value of the impedance of a data driver and the impedance of an input and output pad ‘DQ’.
The on die termination function uses a code signal (hereinafter, impedance calibration code) generated by an operation generally called ‘ZQ’ calibration. The ‘ZQ’ calibration operation is an impedance calibration operation that matches an external resistor connected through an external resistor connecting pad ‘ZQ’ of the semiconductor integrated circuit with a resistance value of a duplicate data driver circuit.
More specifically, the data driver and the on die termination block, which are connected to the input and output pad ‘DQ’, are designed so as to be capable of calibrating their respective impedances according to the code signal, and the impedance calibration code is input to the data driver and the on die termination block to perform the on die termination function.
Referring to FIG. 1, a typical semiconductor integrated circuit performs an impedance calibration operation every time a refresh, in particular, an external refresh command such as an auto refresh command ‘AREF’ commanded by a memory controller is generated in order to conserve written data.
In more detail, the impedance calibration operation, which is performed every time the auto refresh command ‘AREF’ is input, is carried out based upon a recognition that an auto refresh command ‘AREF’ is generated upon the passage of a standard time ‘tRFC=3.9 μs’, which defines the input period of the refresh command. An activation signal ‘ZQ_CALEN’ for starting the impedance calibration operation is therefore activated according to the internally generated refresh signals ‘AREFP’ occur.
The main object of the foregoing impedance calibration operation is to compensate for the change in the input and output characteristics due to fluctuations in temperature among process/voltage/temperature (PVT).
The impedance calibration operation illustrated in FIG. 1 is periodically performed every time the auto refresh command ‘AREF’ is generated, that is, at a standard time interval ‘tRFC=3.9 μs’, as described above. As a consequence, the impedance calibration operation the period between which the impedance calibration operation can be too short, since the impedance calibration operation is performed regardless of the minimum amount of time needed to reflect changes in temperature, for which compensation is necessary.
Therefore, there are problems in that a semiconductor integrated circuit operating as illustrated in FIG. 1 increases the probability of an abnormal fluctuation of the impedance calibration code due to the frequent impedance calibration operation and further the frequent operation increases current consumption of the semiconductor integrated circuit.